Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
To see the actual file transmitted to Xilinx, please click here.

software_version_and_target_device
betaFALSE build_version2258646
date_generatedFri Feb 26 19:28:23 2021 os_platformWIN64
product_versionVivado v2018.2 (64-bit) project_id747a1cbe9a3c4155a79fe30990dab5ce
project_iteration16 random_id67e9cf6464745555b8528becd910f554
registration_id67e9cf6464745555b8528becd910f554 route_designTRUE
target_devicexc7a100t target_familyartix7
target_packagefgg676 target_speed-2
tool_flowVivado

user_environment
cpu_nameIntel(R) Core(TM) i7-6700HQ CPU @ 2.60GHz cpu_speed2592 MHz
os_nameMicrosoft Windows 8 or later , 64-bit os_releasemajor release (build 9200)
system_ram17.000 GB total_processors1

vivado_usage
gui_handlers
abstractfileview_reload=1 addilaprobespopup_ok=3 addsrcwizard_specify_hdl_netlist_block_design=1 addsrcwizard_specify_or_create_constraint_files=1
basedialog_apply=2 basedialog_cancel=32 basedialog_close=2 basedialog_ok=79
basedialog_yes=25 cmdmsgdialog_ok=16 constraintschooserpanel_create_file=1 coretreetablepanel_core_tree_table=21
createconstraintsfilepanel_file_name=1 debugmenu_remove_from_unassigned_debug_nets=1 debugview_debug_cores_tree_table=28 debugwizard_advanced_trigger=3
debugwizard_capture_control=5 debugwizard_chipscope_tree_table=31 debugwizard_disconnect_all_nets_and_remove_debug=1 debugwizard_only_debug_new_nets=1
debugwizard_sample_of_data_depth=6 debugwizard_select_clock_domain=2 debugwizard_set_probe_type=3 filesetpanel_file_set_panel_tree=312
filesetpanel_messages=2 flownavigatortreepanel_flow_navigator_tree=108 fpgachooser_category=1 fpgachooser_family=1
fpgachooser_fpga_table=2 fpgachooser_package=4 fpgachooser_speed=1 gettingstartedview_create_new_project=1
graphicalview_zoom_in=99 graphicalview_zoom_out=185 hardwareilawaveformview_run_trigger_for_this_ila_core=69 hardwareilawaveformview_run_trigger_immediate_for_this_ila_core=1
hardwareilawaveformview_stop_trigger_for_this_ila_core=12 hardwareilawaveformview_toggle_auto_re_trigger_mode=2 hardwaretreepanel_hardware_tree_table=59 hcodeeditor_blank_operations=1
hcodeeditor_search_text_combo_box=21 hinputhandler_toggle_line_comments=7 hpopuptitle_close=1 ilaprobetablepanel_add_probe=3
ilaprobetablepanel_specify_probes_file_and_refresh=1 languagetemplatesdialog_copy=1 languagetemplatesdialog_templates_tree=211 mainmenumgr_checkpoint=5
mainmenumgr_edit=12 mainmenumgr_export=4 mainmenumgr_file=14 mainmenumgr_flow=9
mainmenumgr_help=2 mainmenumgr_ip=5 mainmenumgr_open_recent_file=2 mainmenumgr_project=7
mainmenumgr_reports=8 mainmenumgr_text_editor=7 mainmenumgr_tools=16 mainmenumgr_view=7
mainmenumgr_window=10 mainwinmenumgr_layout=8 msgtreepanel_discard_user_created_messages=1 msgtreepanel_message_severity=1
msgtreepanel_message_view_tree=70 msgview_error_messages=8 msgview_expand_all=1 msgview_filter_messages=1
msgview_warning_messages=2 netlisttreeview_netlist_tree=1 pacommandnames_add_sources=3 pacommandnames_auto_connect_target=9
pacommandnames_auto_update_hier=5 pacommandnames_close_server=4 pacommandnames_close_target=3 pacommandnames_language_templates=7
pacommandnames_open_hardware_manager=2 pacommandnames_open_target=1 pacommandnames_open_target_wizard=9 pacommandnames_program_fpga=7
pacommandnames_refresh_target=1 pacommandnames_run_implementation=1 pacommandnames_run_trigger=1 pacommandnames_save_design=6
pacommandnames_stop_trigger=1 paviews_code=2 paviews_dashboard=29 paviews_device=1
paviews_ip_catalog=1 paviews_project_summary=1 paviews_schematic=1 pickclockdomainnetdialog_clock_domain_nets_tree=1
probesview_probes_tree=2 programdebugtab_available_targets_on_server=1 programdebugtab_open_recently_opened_target=16 programdebugtab_open_target=10
programdebugtab_program_device=8 programdebugtab_refresh_device=2 programfpgadialog_program=16 programfpgadialog_specify_bitstream_file=1
programfpgadialog_specify_debug_probes_file=1 progressdialog_cancel=1 projectnamechooser_project_name=1 projecttab_close_design=2
projecttab_reload=3 rdicommands_copy=2 rdicommands_custom_commands=2 rdicommands_delete=1
rdicommands_line_comment=1 rdicommands_property_editor=1 rdicommands_save_file=47 rdicommands_settings=2
rdicommands_undo=3 rdiviews_property_editor=1 rdiviews_waveform_viewer=149 refreshdevicedialog_refresh_device=1
saveprojectutils_cancel=1 saveprojectutils_save=6 selectmenu_highlight=6 settingsdialog_options_tree=7
simpleoutputproductdialog_generate_output_products_immediately=3 srcchooserpanel_add_hdl_and_netlist_files_to_your_project=2 srcchooserpanel_add_or_create_source_file=1 srcmenu_ip_hierarchy=5
syntheticagettingstartedview_recent_projects=5 targetchooserpanel_target_chooser_table=11 tclconsoleview_tcl_console_code_editor=5 touchpointsurveydialog_no=1
touchpointsurveydialog_remind_me_later=1 triggersetuppanel_table=118 waveformnametree_waveform_name_tree=290 waveformview_add=1
java_command_handlers
addsources=3 autoconnecttarget=9 closeserver=4 closetarget=4
coreview=5 customizecore=6 debugwizardcmdhandler=11 editdelete=1
editpaste=2 launchopentarget=9 launchprogramfpga=19 newhardwaredashboard=3
newproject=1 openhardwaredashboard=3 openhardwaremanager=17 openrecenttarget=13
opentarget=1 programdevice=4 recustomizecore=12 refreshdevice=3
runbitgen=25 runimplementation=1 runschematic=2 runsynthesis=6
runtrigger=69 runtriggerimmediate=1 savedesign=6 showpropertyeditor=1
showview=11 stoptrigger=13 toolssettings=2 toolstemplates=8
viewlayoutcmd=1 viewtaskprogramanddebug=2 viewtaskprojectmanager=6
other_data
guimode=13
project_data
constraintsetcount=1 core_container=false currentimplrun=impl_1 currentsynthesisrun=synth_1
default_library=xil_defaultlib designmode=RTL export_simulation_activehdl=3 export_simulation_ies=3
export_simulation_modelsim=3 export_simulation_questa=3 export_simulation_riviera=3 export_simulation_vcs=3
export_simulation_xsim=3 implstrategy=Vivado Implementation Defaults launch_simulation_activehdl=0 launch_simulation_ies=0
launch_simulation_modelsim=0 launch_simulation_questa=0 launch_simulation_riviera=0 launch_simulation_vcs=0
launch_simulation_xsim=0 simulator_language=Mixed srcsetcount=4 synthesisstrategy=Vivado Synthesis Defaults
target_language=Verilog target_simulator=XSim totalimplruns=3 totalsynthesisruns=3

unisim_transformation
post_unisim_transformation
bufg=6 bufh=1 carry4=165 fdce=3
fdpe=79 fdre=4500 fdse=210 gnd=81
ibuf=1 ibuf_intermdisable=16 ibufds_intermdisable_int=4 iddr=2
idelayctrl=1 idelaye2=16 in_fifo=2 inv=3
iserdese2=16 lut1=402 lut2=572 lut3=1081
lut4=1109 lut5=1340 lut6=2034 mmcme2_adv=1
muxf7=16 obuf=23 obufds=2 obuft=18
obuftds=4 oddr=5 oserdese2=42 out_fifo=4
phaser_in_phy=2 phaser_out_phy=4 phaser_ref=1 phy_control=1
plle2_adv=2 ramd32=624 rams32=208 srl16e=17
srlc32e=1 vcc=77 xadc=1
pre_unisim_transformation
bufg=6 bufh=1 carry4=165 fdce=3
fdpe=79 fdre=4500 fdse=210 gnd=81
ibuf=1 iddr=2 idelayctrl=1 idelaye2=16
in_fifo=2 iobuf_intermdisable=16 iobufds_diff_out_intermdisable=2 iserdese2=16
lut1=402 lut2=572 lut3=1081 lut4=1109
lut5=1340 lut6=2034 mmcme2_adv=1 muxf7=16
obuf=23 obufds=1 obuft=2 oddr=5
oserdese2=42 out_fifo=4 phaser_in_phy=2 phaser_out_phy=4
phaser_ref=1 phy_control=1 plle2_adv=2 ram32m=104
srl16e=17 srlc32e=1 vcc=77 xadc=1

power_opt_design
command_line_options_spo
-cell_types=default::all -clocks=default::[not_specified] -exclude_cells=default::[not_specified] -include_cells=default::[not_specified]
usage
bram_ports_augmented=44 bram_ports_newly_gated=0 bram_ports_total=88 flow_state=default
slice_registers_augmented=0 slice_registers_newly_gated=0 slice_registers_total=9723 srls_augmented=0
srls_newly_gated=0 srls_total=1560

ip_statistics
clk_wiz_v6_0_1_0_0/1
clkin1_period=20.000 clkin2_period=10.0 clock_mgr_type=NA component_name=sys_pll
core_container=NA enable_axi=0 feedback_source=FDBK_AUTO feedback_type=SINGLE
iptotal=1 manual_override=false num_out_clk=2 primitive=PLL
use_dyn_phase_shift=false use_dyn_reconfig=false use_inclk_stopped=false use_inclk_switchover=false
use_locked=true use_max_i_jitter=false use_min_o_jitter=false use_phase_alignment=true
use_power_down=false use_reset=true
labtools_ila_v6_00_a/1
all_probe_same_mu=true all_probe_same_mu_cnt=2 c_adv_trigger=false c_data_depth=4096
c_en_strg_qual=true c_input_pipe_stages=0 c_num_of_probes=18 c_probe0_type=0
c_probe0_width=128 c_probe10_type=0 c_probe10_width=1 c_probe11_type=0
c_probe11_width=1 c_probe12_type=0 c_probe12_width=1 c_probe13_type=0
c_probe13_width=1 c_probe14_type=0 c_probe14_width=1 c_probe15_type=0
c_probe15_width=1 c_probe16_type=0 c_probe16_width=1 c_probe17_type=0
c_probe17_width=1 c_probe1_type=0 c_probe1_width=2 c_probe2_type=0
c_probe2_width=28 c_probe3_type=0 c_probe3_width=128 c_probe4_type=0
c_probe4_width=32 c_probe5_type=0 c_probe5_width=27 c_probe6_type=0
c_probe6_width=3 c_probe7_type=0 c_probe7_width=32 c_probe8_type=0
c_probe8_width=1 c_probe9_type=0 c_probe9_width=1 c_trigin_en=0
c_trigout_en=0 component_name=u_ila_0_CV core_container=NA iptotal=1
labtools_xsdbm_v3_00_a/1
c_bscan_mode=false c_bscan_mode_with_core=false c_clk_input_freq_hz=300000000 c_en_bscanid_vec=false
c_enable_clk_divider=false c_num_bscan_master_ports=0 c_two_prim_mode=false c_use_ext_bscan=false
c_user_scan_chain=1 c_xsdb_num_slaves=1 component_name=dbg_hub_CV core_container=NA
iptotal=1
mig_7series_v4_1/1
axi_enable=0 burst_mode=8 burst_type=SEQ ca_mirror=OFF
clk_period=2500 clkin_period=10000 core_container=NA data_mask=1
debug_port=OFF dq_width=16 ecc=OFF interface_type=DDR3
internal_vref=1 iptotal=1 language=Verilog level=CONTROLLER
memory_address_map=ROW_BANK_COLUMN memory_part=g128m16xx-125 memory_type=COMP no_of_controllers=1
ordering=STRICT output_drv=HIGH phy_ratio=4 refclk_freq=200
refclk_type=NO_BUFFER rtt_nom=60 synthesis_tool=Vivado sysclk_type=NO_BUFFER
use_cs_port=0 use_odt_port=1 vccaux_io=1.8V

report_drc
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -internal=default::[not_specified] -internal_only=default::[not_specified] -messages=default::[not_specified]
-name=default::[not_specified] -no_waivers=default::[not_specified] -return_string=default::[not_specified] -ruledecks=default::[not_specified]
-upgrade_cw=default::[not_specified] -waived=default::[not_specified]
results
bufc-1=2 reqp-1709=1 rtstat-10=1

report_methodology
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified] -return_string=default::[not_specified]
-waived=default::[not_specified]
results
lutar-1=5 pdrc-190=28 reqp-1959=16 xdcb-5=1
xdcc-1=1 xdcc-7=1

report_power
command_line_options
-advisory=default::[not_specified] -append=default::[not_specified] -file=[specified] -format=default::text
-hier=default::power -l=default::[not_specified] -name=default::[not_specified] -no_propagation=default::[not_specified]
-return_string=default::[not_specified] -rpx=[specified] -verbose=default::[not_specified] -vid=default::[not_specified]
-xpe=default::[not_specified]
usage
airflow=250 (LFM) ambient_temp=25.0 (C) bi-dir_toggle=12.500000 bidir_output_enable=1.000000
board_layers=12to15 (12 to 15 Layers) board_selection=medium (10"x10") bram=0.028596 clocks=0.051335
confidence_level_clock_activity=High confidence_level_design_state=High confidence_level_device_models=High confidence_level_internal_activity=Medium
confidence_level_io_activity=Low confidence_level_overall=Low customer=TBD customer_class=TBD
devstatic=0.093500 die=xc7a100tfgg676-2 dsp_output_toggle=12.500000 dynamic=0.846039
effective_thetaja=2.6 enable_probability=0.990000 family=artix7 ff_toggle=12.500000
flow_state=routed heatsink=medium (Medium Profile) i/o=0.296251 input_toggle=12.500000
junction_temp=27.5 (C) logic=0.016188 mgtavcc_dynamic_current=0.000000 mgtavcc_static_current=0.000000
mgtavcc_total_current=0.000000 mgtavcc_voltage=1.000000 mgtavtt_dynamic_current=0.000000 mgtavtt_static_current=0.000000
mgtavtt_total_current=0.000000 mgtavtt_voltage=1.200000 mmcm=0.094987 netlist_net_matched=NA
off-chip_power=0.526268 on-chip_power=0.939538 output_enable=1.000000 output_load=5.000000
output_toggle=12.500000 package=fgg676 pct_clock_constrained=24.000000 pct_inputs_defined=4
phaser=0.134441 platform=nt64 pll=0.197455 process=typical
ram_enable=50.000000 ram_write=50.000000 read_saif=False set/reset_probability=0.000000
signal_rate=False signals=0.022905 simulation_file=None speedgrade=-2
static_prob=False temp_grade=commercial thetajb=6.8 (C/W) thetasa=4.6 (C/W)
toggle_rate=False user_board_temp=25.0 (C) user_effective_thetaja=2.6 user_junc_temp=27.5 (C)
user_thetajb=6.8 (C/W) user_thetasa=4.6 (C/W) vccadc_dynamic_current=0.001600 vccadc_static_current=0.020000
vccadc_total_current=0.021600 vccadc_voltage=1.800000 vccaux_dynamic_current=0.269944 vccaux_io_dynamic_current=0.000000
vccaux_io_static_current=0.000000 vccaux_io_total_current=0.000000 vccaux_io_voltage=1.800000 vccaux_static_current=0.018248
vccaux_total_current=0.288192 vccaux_voltage=1.800000 vccbram_dynamic_current=0.002002 vccbram_static_current=0.001341
vccbram_total_current=0.003343 vccbram_voltage=1.000000 vccint_dynamic_current=0.168061 vccint_static_current=0.017313
vccint_total_current=0.185374 vccint_voltage=1.000000 vcco12_dynamic_current=0.000000 vcco12_static_current=0.000000
vcco12_total_current=0.000000 vcco12_voltage=1.200000 vcco135_dynamic_current=0.000000 vcco135_static_current=0.000000
vcco135_total_current=0.000000 vcco135_voltage=1.350000 vcco15_dynamic_current=0.475642 vcco15_static_current=0.004000
vcco15_total_current=0.479642 vcco15_voltage=1.500000 vcco18_dynamic_current=0.000000 vcco18_static_current=0.000000
vcco18_total_current=0.000000 vcco18_voltage=1.800000 vcco25_dynamic_current=0.000000 vcco25_static_current=0.000000
vcco25_total_current=0.000000 vcco25_voltage=2.500000 vcco33_dynamic_current=0.000000 vcco33_static_current=0.000000
vcco33_total_current=0.000000 vcco33_voltage=3.300000 version=2018.2 xadc=0.003880

report_utilization
clocking
bufgctrl_available=32 bufgctrl_fixed=0 bufgctrl_used=5 bufgctrl_util_percentage=15.63
bufhce_available=96 bufhce_fixed=0 bufhce_used=1 bufhce_util_percentage=1.04
bufio_available=24 bufio_fixed=0 bufio_used=0 bufio_util_percentage=0.00
bufmrce_available=12 bufmrce_fixed=0 bufmrce_used=0 bufmrce_util_percentage=0.00
bufr_available=24 bufr_fixed=0 bufr_used=0 bufr_util_percentage=0.00
mmcme2_adv_available=6 mmcme2_adv_fixed=1 mmcme2_adv_used=1 mmcme2_adv_util_percentage=16.67
plle2_adv_available=6 plle2_adv_fixed=1 plle2_adv_used=2 plle2_adv_util_percentage=33.33
dsp
dsps_available=240 dsps_fixed=0 dsps_used=0 dsps_util_percentage=0.00
io_standard
blvds_25=0 diff_hstl_i=0 diff_hstl_i_18=0 diff_hstl_ii=0
diff_hstl_ii_18=0 diff_hsul_12=0 diff_mobile_ddr=0 diff_sstl135=0
diff_sstl135_r=0 diff_sstl15=1 diff_sstl15_r=0 diff_sstl18_i=0
diff_sstl18_ii=0 hstl_i=0 hstl_i_18=0 hstl_ii=0
hstl_ii_18=0 hsul_12=0 lvcmos12=0 lvcmos15=1
lvcmos18=0 lvcmos25=0 lvcmos33=1 lvds_25=0
lvttl=0 mini_lvds_25=0 mobile_ddr=0 pci33_3=0
ppds_25=0 rsds_25=0 sstl135=0 sstl135_r=0
sstl15=1 sstl15_r=0 sstl18_i=0 sstl18_ii=0
tmds_33=0
memory
block_ram_tile_available=135 block_ram_tile_fixed=0 block_ram_tile_used=43.5 block_ram_tile_util_percentage=32.22
ramb18_available=270 ramb18_fixed=0 ramb18_used=1 ramb18_util_percentage=0.37
ramb18e1_only_used=1 ramb36_fifo_available=135 ramb36_fifo_fixed=0 ramb36_fifo_used=43
ramb36_fifo_util_percentage=31.85 ramb36e1_only_used=43
primitives
bscane2_functional_category=Others bscane2_used=1 bufg_functional_category=Clock bufg_used=5
bufh_functional_category=Clock bufh_used=1 carry4_functional_category=CarryLogic carry4_used=363
fdce_functional_category=Flop & Latch fdce_used=174 fdpe_functional_category=Flop & Latch fdpe_used=93
fdre_functional_category=Flop & Latch fdre_used=9245 fdse_functional_category=Flop & Latch fdse_used=211
ibuf_functional_category=IO ibuf_intermdisable_functional_category=IO ibuf_intermdisable_used=16 ibuf_used=1
ibufds_intermdisable_int_functional_category=IO ibufds_intermdisable_int_used=4 idelayctrl_functional_category=IO idelayctrl_used=1
idelaye2_functional_category=IO idelaye2_used=16 in_fifo_functional_category=IO in_fifo_used=2
inv_functional_category=LUT inv_used=3 iserdese2_functional_category=IO iserdese2_used=16
lut1_functional_category=LUT lut1_used=415 lut2_functional_category=LUT lut2_used=745
lut3_functional_category=LUT lut3_used=1314 lut4_functional_category=LUT lut4_used=1598
lut5_functional_category=LUT lut5_used=1561 lut6_functional_category=LUT lut6_used=3367
mmcme2_adv_functional_category=Clock mmcme2_adv_used=1 muxf7_functional_category=MuxFx muxf7_used=176
muxf8_functional_category=MuxFx muxf8_used=9 obuf_functional_category=IO obuf_used=23
obufds_functional_category=IO obufds_used=2 obuft_functional_category=IO obuft_used=18
obuftds_functional_category=IO obuftds_used=4 oddr_functional_category=IO oddr_used=5
oserdese2_functional_category=IO oserdese2_used=42 out_fifo_functional_category=IO out_fifo_used=4
phaser_in_phy_functional_category=IO phaser_in_phy_used=2 phaser_out_phy_functional_category=IO phaser_out_phy_used=4
phaser_ref_functional_category=IO phaser_ref_used=1 phy_control_functional_category=IO phy_control_used=1
plle2_adv_functional_category=Clock plle2_adv_used=2 ramb18e1_functional_category=Block Memory ramb18e1_used=1
ramb36e1_functional_category=Block Memory ramb36e1_used=43 ramd32_functional_category=Distributed Memory ramd32_used=660
rams32_functional_category=Distributed Memory rams32_used=220 srl16e_functional_category=Distributed Memory srl16e_used=956
srlc16e_functional_category=Distributed Memory srlc16e_used=2 srlc32e_functional_category=Distributed Memory srlc32e_used=602
xadc_functional_category=Others xadc_used=1
slice_logic
f7_muxes_available=31700 f7_muxes_fixed=0 f7_muxes_used=176 f7_muxes_util_percentage=0.56
f8_muxes_available=15850 f8_muxes_fixed=0 f8_muxes_used=9 f8_muxes_util_percentage=0.06
lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=440 lut_as_logic_available=63400 lut_as_logic_fixed=0
lut_as_logic_used=7764 lut_as_logic_util_percentage=12.25 lut_as_memory_available=19000 lut_as_memory_fixed=0
lut_as_memory_used=1262 lut_as_memory_util_percentage=6.64 lut_as_shift_register_fixed=0 lut_as_shift_register_used=822
register_as_flip_flop_available=126800 register_as_flip_flop_fixed=0 register_as_flip_flop_used=9723 register_as_flip_flop_util_percentage=7.67
register_as_latch_available=126800 register_as_latch_fixed=0 register_as_latch_used=0 register_as_latch_util_percentage=0.00
slice_luts_available=63400 slice_luts_fixed=0 slice_luts_used=9026 slice_luts_util_percentage=14.24
slice_registers_available=126800 slice_registers_fixed=0 slice_registers_used=9723 slice_registers_util_percentage=7.67
fully_used_lut_ff_pairs_fixed=7.67 fully_used_lut_ff_pairs_used=579 lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=440
lut_as_logic_available=63400 lut_as_logic_fixed=0 lut_as_logic_used=7764 lut_as_logic_util_percentage=12.25
lut_as_memory_available=19000 lut_as_memory_fixed=0 lut_as_memory_used=1262 lut_as_memory_util_percentage=6.64
lut_as_shift_register_fixed=0 lut_as_shift_register_used=822 lut_ff_pairs_with_one_unused_flip_flop_fixed=822 lut_ff_pairs_with_one_unused_flip_flop_used=2989
lut_ff_pairs_with_one_unused_lut_output_fixed=2989 lut_ff_pairs_with_one_unused_lut_output_used=3178 lut_flip_flop_pairs_available=63400 lut_flip_flop_pairs_fixed=0
lut_flip_flop_pairs_used=4092 lut_flip_flop_pairs_util_percentage=6.45 slice_available=15850 slice_fixed=0
slice_used=3463 slice_util_percentage=21.85 slicel_fixed=0 slicel_used=2481
slicem_fixed=0 slicem_used=982 unique_control_sets_used=421 using_o5_and_o6_fixed=421
using_o5_and_o6_used=738 using_o5_output_only_fixed=738 using_o5_output_only_used=20 using_o6_output_only_fixed=20
using_o6_output_only_used=64
specific_feature
bscane2_available=4 bscane2_fixed=0 bscane2_used=1 bscane2_util_percentage=25.00
capturee2_available=1 capturee2_fixed=0 capturee2_used=0 capturee2_util_percentage=0.00
dna_port_available=1 dna_port_fixed=0 dna_port_used=0 dna_port_util_percentage=0.00
efuse_usr_available=1 efuse_usr_fixed=0 efuse_usr_used=0 efuse_usr_util_percentage=0.00
frame_ecce2_available=1 frame_ecce2_fixed=0 frame_ecce2_used=0 frame_ecce2_util_percentage=0.00
icape2_available=2 icape2_fixed=0 icape2_used=0 icape2_util_percentage=0.00
pcie_2_1_available=1 pcie_2_1_fixed=0 pcie_2_1_used=0 pcie_2_1_util_percentage=0.00
startupe2_available=1 startupe2_fixed=0 startupe2_used=0 startupe2_util_percentage=0.00
xadc_available=1 xadc_fixed=0 xadc_used=1 xadc_util_percentage=100.00

router
usage
actual_expansions=12392269 bogomips=0 bram18=1 bram36=43
bufg=0 bufr=0 congestion_level=0 ctrls=421
dsp=0 effort=2 estimated_expansions=15550614 ff=9723
global_clocks=5 high_fanout_nets=9 iob=48 lut=10026
movable_instances=22920 nets=24878 pins=144356 pll=2
router_runtime=1.000000 router_timing_driven=1 threads=2 timing_constraints_exist=1

synthesis
command_line_options
-assert=default::[not_specified] -bufg=default::12 -cascade_dsp=default::auto -constrset=default::[not_specified]
-control_set_opt_threshold=default::auto -directive=default::default -fanout_limit=default::10000 -flatten_hierarchy=default::rebuilt
-fsm_extraction=default::auto -gated_clock_conversion=default::off -generic=default::[not_specified] -include_dirs=default::[not_specified]
-keep_equivalent_registers=default::[not_specified] -max_bram=default::-1 -max_bram_cascade_height=default::-1 -max_dsp=default::-1
-max_uram=default::-1 -max_uram_cascade_height=default::-1 -mode=default::default -name=default::[not_specified]
-no_lc=default::[not_specified] -no_srlextract=default::[not_specified] -no_timing_driven=default::[not_specified] -part=xc7a100tfgg676-2
-resource_sharing=default::auto -retiming=default::[not_specified] -rtl=default::[not_specified] -rtl_skip_constraints=default::[not_specified]
-rtl_skip_ip=default::[not_specified] -seu_protect=default::none -sfcu=default::[not_specified] -shreg_min_size=default::3
-top=DDR3_top -verilog_define=default::[not_specified]
usage
elapsed=00:00:41s hls_ip=0 memory_gain=512.996MB memory_peak=891.348MB