BUFFER_IMPLEMENTATION=RAM
COMMON_RX_TX_PLL=OFF
clk_src_is_pll=off
DATA_RATE="800.0 Mbps"
DESERIALIZATION_FACTOR=1
ENABLE_CLOCK_PIN_MODE=UNUSED
ENABLE_DPA_CALIBRATION=ON
ENABLE_DPA_MODE=OFF
ENABLE_SOFT_CDR_MODE=OFF
IMPLEMENT_IN_LES=ON
INCLOCK_BOOST=0
INCLOCK_PERIOD=5000
INCLOCK_PHASE_SHIFT=0
INPUT_DATA_RATE=800
INTENDED_DEVICE_FAMILY="Cyclone 10 LP"
LPM_HINT=UNUSED
LPM_TYPE=altlvds_rx
LVDS_RX_REG_SETTING=ON
NUMBER_OF_CHANNELS=1
PLL_OPERATION_MODE=UNUSED
PORT_RX_DATA_ALIGN=PORT_UNUSED
REFCLK_FREQUENCY=UNUSED
REGISTERED_OUTPUT=OFF
SIM_DPA_OUTPUT_CLOCK_PHASE_SHIFT=0
USE_CORECLOCK_INPUT=OFF
USE_EXTERNAL_PLL=OFF
X_ON_BITSLIP=ON
DEVICE_FAMILY="Cyclone 10 LP"
CBX_AUTO_BLACKBOX=ALL
rx_in
rx_out
